| Author |
Message |
Jim Thompson
Guest
|
 Posted:
Thu Dec 08, 2005 1:08 am Post subject:
Re: electrical interface problem |
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On Wed, 7 Dec 2005 11:56:31 +0100, "Melanie Nasic"
<quinn_the_esquimo@freenet.de> wrote:
| Quote: | Hi there,
I'm currently working on a board design and I have to interface two VLSI
chips to each other that don't have exactly compatible level
characteristics. To be more precise I have a differential CML output of U(t)
= 1.8V +/- 0.400V * rect(t) being terminated 50 Ohm to Vref and a
non-standard differential Input which assumes U(t) = 1.15V +/- 0.125V *
rect(t) being 100 Ohm differentially terminated.
I first thought about AC coupling but that only kills my DC part but doesn't
come to solve the problem of incompatible swings. Maybe a resistor network
would be the right choice but I am not so firm on that topic. Any help,
suggestions and calculation examples would be appreciated.
Many thanks in advance and best regards,
Melanie
|
See...
Newsgroups: alt.binaries.schematics.electronic
Subject: electrical interface problem - MelanieCML.pdf
Message-ID: <6acep1d0gm5qbckb17t6506aof82lfbd60@4ax.com>
for a possible solution.
(If you can't access the binary group let me know and I will post to a
URL.)
This uses AC coupling.
If you happen to have the luxury of being able to adjust the current
source in the CML output, I think this can be done direct-coupled.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
|
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John Fields
Guest
|
| Posted:
Thu Dec 08, 2005 1:35 am Post subject:
Re: electrical interface problem |
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On Wed, 07 Dec 2005 09:46:04 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@My-Web-Site.com> wrote:
| Quote: | I don't know what is the real spec, since I'm always on-chip and run
as little as 150mV P-P differential... gotta keep those swings down
when you're doing 3GHz ;-)
|
---
So, no help offered, just more of your "Look at me, Ma" bullshit.
--
John Fields
Professional Circuit Designer |
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qrk
Guest
|
| Posted:
Thu Dec 08, 2005 1:35 am Post subject:
Re: electrical interface problem |
|
|
On Wed, 7 Dec 2005 11:56:31 +0100, "Melanie Nasic"
<quinn_the_esquimo@freenet.de> wrote:
| Quote: | Hi there,
I'm currently working on a board design and I have to interface two VLSI
chips to each other that don't have exactly compatible level
characteristics. To be more precise I have a differential CML output of U(t)
= 1.8V +/- 0.400V * rect(t) being terminated 50 Ohm to Vref and a
non-standard differential Input which assumes U(t) = 1.15V +/- 0.125V *
rect(t) being 100 Ohm differentially terminated.
I first thought about AC coupling but that only kills my DC part but doesn't
come to solve the problem of incompatible swings. Maybe a resistor network
would be the right choice but I am not so firm on that topic. Any help,
suggestions and calculation examples would be appreciated.
Many thanks in advance and best regards,
Melanie
|
See Message-ID: <0bjep1hbrm067tksqjgtoqanvme5c310tl@4ax.com> in
alt.binaries.schematic.electronic, subject "electrical interface
problem" for a PDF on this discussion.
See if the schematic in abse is what you are thinking of. If so, then
you might get by with an attenuator and a DC voltage divider. R4-R8 is
the attenuator which provides 10.1 dB of attenuation. R7, R8, and R10
form the DC voltage divider. R9 is the terminator for your mystery
device.
You can see in the simulation that your input common mode level is
1.15V and the signal level to the input (v(inp,inn))is 0.125Vpp. The
equivalent power supply voltage running your 50 Ohm source resistors,
VTTX, is 2.14 VDC which meets the Xilinx VTTX minimum supply of 1.8V.
Is this close to what you are thinking of?
---
Mark
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none
Guest
|
| Posted:
Thu Dec 08, 2005 9:35 am Post subject:
Re: electrical interface problem |
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|
Since this is a xilinx related issue you might try to post this
question to comp.arch.fpga where the xilinx folks hang out.
Others have run into this and generally are very happy to give
answers. There are people from xilinx there as well to answer
questions.
Melanie Nasic wrote:
| Quote: | What 50 ohm resistors (on-chip or off-chip) are you referring to, Jim? The
CML transmitters have an internal 50 ohms to Vcc. And a question to John: I
didn't understand why I get logic levels of Vcc and Vcc-0.4 if I terminate
again externally? Where does the 0.4V come from? Or is it my swing that Vcc
is high and Vcc-0.4 is low voltage level?
Thanks, Mel
"John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> schrieb im
Newsbeitrag news:kf5ep1p3ir5euum0h02ogu4n7h8t72th42@4ax.com...
On Wed, 07 Dec 2005 09:46:04 -0700, Jim Thompson
To-Email-Use-The-Envelope-Icon@My-Web-Site.com> wrote:
On Wed, 07 Dec 2005 08:29:53 -0800, John Larkin
jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:
On Wed, 07 Dec 2005 09:00:07 -0700, Jim Thompson
To-Email-Use-The-Envelope-Icon@My-Web-Site.com> wrote:
On Wed, 7 Dec 2005 11:56:31 +0100, "Melanie Nasic"
quinn_the_esquimo@freenet.de> wrote:
Hi there,
I'm currently working on a board design and I have to interface two
VLSI
chips to each other that don't have exactly compatible level
characteristics. To be more precise I have a differential CML output of
U(t)
= 1.8V +/- 0.400V * rect(t) being terminated 50 Ohm to Vref and a
non-standard differential Input which assumes U(t) = 1.15V +/- 0.125V *
rect(t) being 100 Ohm differentially terminated.
I first thought about AC coupling but that only kills my DC part but
doesn't
come to solve the problem of incompatible swings. Maybe a resistor
network
would be the right choice but I am not so firm on that topic. Any help,
suggestions and calculation examples would be appreciated.
Many thanks in advance and best regards,
Melanie
May I presume that Vref is +2.2V and the CML is open-collector pulling
current through the 50 ohm terminations to make the ±400mV signals?
8mA alternating from each collector?
Can additional current be drawn from Vref?
...Jim Thompson
I think CML is usually a unidirectional current sink, an open
collector, pulling about 16 mA for the full-swing version, basicly an
ECL sort of stage without the emitter follower. Some have an internal
termination to Vcc, some don't.
Somebody correct me if I'm wrong.
Melanie may be able to do a direct connection, depending on the
common-mode specs of the receiver. We need more detail.
John
±400mV differential would imply an 8mA current source, steered by a
diff-pair. But sometimes people get balled up in confusion about
differential peak and peak-to-peak.
But 16mA _would_ give the conventional 800mV single-ended output.
I don't know what is the real spec, since I'm always on-chip and run
as little as 150mV P-P differential... gotta keep those swings down
when you're doing 3GHz ;-)
...Jim Thompson
Well, you don't have long tranny lines and remote terminations
on-chip! If you did, the chips would be toast.
Some of the CML parts, like a few of the GigaLogic things, have an
internal 50 ohms to Vcc, so that if you terminate again, externally,
you get logic levels of Vcc and Vcc-0.4.
I think "current mode logic" is a sometimes generic term, not precise
like, say "TTL". (Just a little joke here.)
A couple of the Giga parts have pure current sinks that are externally
programmable, all the way down to zero if you cheat a little, very
clean and linear, 40 ps edges. That can be real handy.
John
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Michael A. Terrell
Guest
|
| Posted:
Thu Dec 08, 2005 9:35 am Post subject:
Re: electrical interface problem |
|
|
John Fields wrote:
| Quote: |
On Wed, 07 Dec 2005 09:46:04 -0700, Jim Thompson
To-Email-Use-The-Envelope-Icon@My-Web-Site.com> wrote:
I don't know what is the real spec, since I'm always on-chip and run
as little as 150mV P-P differential... gotta keep those swings down
when you're doing 3GHz ;-)
---
So, no help offered, just more of your "Look at me, Ma" bullshit.
--
John Fields
Professional Circuit Designer
|
What else do you expect out of him, John? he has to beat his chest
at every chance to try to convince himself he's still worth something.
--
?
Michael A. Terrell
Central Florida |
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Melanie Nasic
Guest
|
| Posted:
Thu Dec 08, 2005 4:40 pm Post subject:
Re: electrical interface problem |
|
|
Oh, thank you so much.... everything became quite clear as I had a look at
your drawings. I'm not sure if AC coupling like proposed by Jim Thompson in
MelanieCML.pdf is relly necessary. In my oppinion a "plain" resistor network
will do the job, so no need for AC coupling, right?
Regards, Mel
"qrk" <SpamTrap@spam.net> schrieb im Newsbeitrag
news:p5jep1t0jm99oupiciml5shum6ecqbq647@4ax.com...
| Quote: | On Wed, 7 Dec 2005 11:56:31 +0100, "Melanie Nasic"
quinn_the_esquimo@freenet.de> wrote:
Hi there,
I'm currently working on a board design and I have to interface two VLSI
chips to each other that don't have exactly compatible level
characteristics. To be more precise I have a differential CML output of
U(t)
= 1.8V +/- 0.400V * rect(t) being terminated 50 Ohm to Vref and a
non-standard differential Input which assumes U(t) = 1.15V +/- 0.125V *
rect(t) being 100 Ohm differentially terminated.
I first thought about AC coupling but that only kills my DC part but
doesn't
come to solve the problem of incompatible swings. Maybe a resistor network
would be the right choice but I am not so firm on that topic. Any help,
suggestions and calculation examples would be appreciated.
Many thanks in advance and best regards,
Melanie
See Message-ID: <0bjep1hbrm067tksqjgtoqanvme5c310tl@4ax.com> in
alt.binaries.schematic.electronic, subject "electrical interface
problem" for a PDF on this discussion.
See if the schematic in abse is what you are thinking of. If so, then
you might get by with an attenuator and a DC voltage divider. R4-R8 is
the attenuator which provides 10.1 dB of attenuation. R7, R8, and R10
form the DC voltage divider. R9 is the terminator for your mystery
device.
You can see in the simulation that your input common mode level is
1.15V and the signal level to the input (v(inp,inn))is 0.125Vpp. The
equivalent power supply voltage running your 50 Ohm source resistors,
VTTX, is 2.14 VDC which meets the Xilinx VTTX minimum supply of 1.8V.
Is this close to what you are thinking of?
---
Mark |
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| Back to top |
|
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Melanie Nasic
Guest
|
| Posted:
Thu Dec 08, 2005 5:35 pm Post subject:
Re: electrical interface problem |
|
|
Could someone please do me a favor and post something for me at Newsgroups:
alt.binaries.schematics.electronic.
I think I found a solution myself but I am not sure whether it will work. I
made a drawing and would like to discuss that but I'm not allowed to post at
Newsgroups: alt.binaries.schematics.electronic.
Thanks, Mel
"Melanie Nasic" <quinn_the_esquimo@freenet.de> schrieb im Newsbeitrag
news:dn92g0$r8v$1@mamenchi.zrz.TU-Berlin.DE...
| Quote: | Oh, thank you so much.... everything became quite clear as I had a look at
your drawings. I'm not sure if AC coupling like proposed by Jim Thompson
in MelanieCML.pdf is relly necessary. In my oppinion a "plain" resistor
network will do the job, so no need for AC coupling, right?
Regards, Mel
"qrk" <SpamTrap@spam.net> schrieb im Newsbeitrag
news:p5jep1t0jm99oupiciml5shum6ecqbq647@4ax.com...
On Wed, 7 Dec 2005 11:56:31 +0100, "Melanie Nasic"
quinn_the_esquimo@freenet.de> wrote:
Hi there,
I'm currently working on a board design and I have to interface two VLSI
chips to each other that don't have exactly compatible level
characteristics. To be more precise I have a differential CML output of
U(t)
= 1.8V +/- 0.400V * rect(t) being terminated 50 Ohm to Vref and a
non-standard differential Input which assumes U(t) = 1.15V +/- 0.125V *
rect(t) being 100 Ohm differentially terminated.
I first thought about AC coupling but that only kills my DC part but
doesn't
come to solve the problem of incompatible swings. Maybe a resistor
network
would be the right choice but I am not so firm on that topic. Any help,
suggestions and calculation examples would be appreciated.
Many thanks in advance and best regards,
Melanie
See Message-ID: <0bjep1hbrm067tksqjgtoqanvme5c310tl@4ax.com> in
alt.binaries.schematic.electronic, subject "electrical interface
problem" for a PDF on this discussion.
See if the schematic in abse is what you are thinking of. If so, then
you might get by with an attenuator and a DC voltage divider. R4-R8 is
the attenuator which provides 10.1 dB of attenuation. R7, R8, and R10
form the DC voltage divider. R9 is the terminator for your mystery
device.
You can see in the simulation that your input common mode level is
1.15V and the signal level to the input (v(inp,inn))is 0.125Vpp. The
equivalent power supply voltage running your 50 Ohm source resistors,
VTTX, is 2.14 VDC which meets the Xilinx VTTX minimum supply of 1.8V.
Is this close to what you are thinking of?
---
Mark
|
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| Back to top |
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John Popelish
Guest
|
| Posted:
Thu Dec 08, 2005 5:35 pm Post subject:
Re: electrical interface problem |
|
|
Melanie Nasic wrote:
| Quote: | Could someone please do me a favor and post something for me at Newsgroups:
alt.binaries.schematics.electronic.
I think I found a solution myself but I am not sure whether it will work. I
made a drawing and would like to discuss that but I'm not allowed to post at
Newsgroups: alt.binaries.schematics.electronic.
|
Email them to me, along with the thread title you want them labeled with. |
|
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Melanie Nasic
Guest
|
| Posted:
Thu Dec 08, 2005 5:35 pm Post subject:
help needed for POST: electrical interface problem |
|
|
I think I found a solution to the post "electrical interface problem" but I
am not sure whether it will work. I made a drawing and would like to discuss
that but I'm not allowed to post at Newsgroups:
alt.binaries.schematics.electronic. Could someone help me, please?
I'm sorry for bothering you with this question but I'm out of ideas...
Best Regards,
Melanie Nasic |
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Jim Thompson
Guest
|
| Posted:
Fri Dec 09, 2005 1:35 am Post subject:
Re: electrical interface problem |
|
|
On Wed, 07 Dec 2005 21:49:19 -0800, none <""doug\"@(none)"> wrote:
| Quote: | Since this is a xilinx related issue you might try to post this
question to comp.arch.fpga where the xilinx folks hang out.
Others have run into this and generally are very happy to give
answers. There are people from xilinx there as well to answer
questions.
[snip] |
Also make sure of the rigidity of the 1.15V receiver common-mode spec.
This sounds like LVDS. This number is what the LVDS _transmitter_
puts out. Most of the _receivers_ (Fairchild, for instance, some
parts of which I've designed) can tolerate almost rail-to-rail input
common-mode.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food. |
|
| Back to top |
|
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Melanie Nasic
Guest
|
| Posted:
Fri Dec 09, 2005 4:03 pm Post subject:
Re: electrical interface problem |
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|
John, would you please be so kind to post my message with the binaries?!
Thanks a lot.
Mel
"John Popelish" <jpopelish@rica.net> schrieb im Newsbeitrag
news:XMadnSSYtdKx0QXeRVn-tg@adelphia.com...
| Quote: | Melanie Nasic wrote:
Could someone please do me a favor and post something for me at
Newsgroups: alt.binaries.schematics.electronic.
I think I found a solution myself but I am not sure whether it will work.
I made a drawing and would like to discuss that but I'm not allowed to
post at Newsgroups: alt.binaries.schematics.electronic.
Email them to me, along with the thread title you want them labeled with. |
|
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| Back to top |
|
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John Popelish
Guest
|
| Posted:
Fri Dec 09, 2005 5:35 pm Post subject:
Re: electrical interface problem |
|
|
Melanie Nasic wrote:
| Quote: | John, would you please be so kind to post my message with the binaries?!
Thanks a lot.
|
Your message? Which one?
And I haven't received the binary files from you, yet.
Please email whatever binary files you wish to be posted, to me, along
with whatever text you want included, and I will post the whole thing
on A.B.S.E for you.
| Quote: | Mel
"John Popelish" <jpopelish@rica.net> schrieb im Newsbeitrag
news:XMadnSSYtdKx0QXeRVn-tg@adelphia.com...
Melanie Nasic wrote:
Could someone please do me a favor and post something for me at
Newsgroups: alt.binaries.schematics.electronic.
I think I found a solution myself but I am not sure whether it will work.
I made a drawing and would like to discuss that but I'm not allowed to
post at Newsgroups: alt.binaries.schematics.electronic.
Email them to me, along with the thread title you want them labeled with.
|
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| Back to top |
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Melanie Nasic
Guest
|
| Posted:
Fri Dec 09, 2005 5:35 pm Post subject:
Re: electrical interface problem |
|
|
Hi John,
I've send them to you yesterday along with my email. I did it again for 3
minutes, could you please check? Maybe your mail program thought of me like
spam?! ;-)
Bye, Mel
"John Popelish" <jpopelish@rica.net> schrieb im Newsbeitrag
news:HvKdnbD-bLOwHQTeRVn-jA@adelphia.com...
| Quote: | Melanie Nasic wrote:
John, would you please be so kind to post my message with the binaries?!
Thanks a lot.
Your message? Which one?
And I haven't received the binary files from you, yet.
Please email whatever binary files you wish to be posted, to me, along
with whatever text you want included, and I will post the whole thing on
A.B.S.E for you.
Mel
"John Popelish" <jpopelish@rica.net> schrieb im Newsbeitrag
news:XMadnSSYtdKx0QXeRVn-tg@adelphia.com...
Melanie Nasic wrote:
Could someone please do me a favor and post something for me at
Newsgroups: alt.binaries.schematics.electronic.
I think I found a solution myself but I am not sure whether it will
work. I made a drawing and would like to discuss that but I'm not
allowed to post at Newsgroups: alt.binaries.schematics.electronic.
Email them to me, along with the thread title you want them labeled with.
|
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| Back to top |
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John Popelish
Guest
|
| Posted:
Fri Dec 09, 2005 5:35 pm Post subject:
Re: electrical interface problem |
|
|
Melanie Nasic wrote:
| Quote: | Hi John,
I've send them to you yesterday along with my email. I did it again for 3
minutes, could you please check? Maybe your mail program thought of me like
spam?! ;-)
Bye, Mel
|
Yes, they were in the trash. One of my filters caught them. Sorry.
Posted. |
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Melanie Nasic
Guest
|
| Posted:
Fri Dec 09, 2005 5:35 pm Post subject:
Re: electrical interface problem |
|
|
Hi,
I wonder what is the characteristic impedance of the circuit proposal
CMLmystery.pdf? I think this is the easiest way to do it but I want to be
sure that the CML transmitter still "sees" 50 Ohm line impedance. Any
comments on that?
Bye, Mel.
"John Popelish" <jpopelish@rica.net> schrieb im Newsbeitrag
news:78adnQe3mYkiGgTenZ2dnUVZ_tidnZ2d@adelphia.com...
| Quote: | Melanie Nasic wrote:
Hi John,
I've send them to you yesterday along with my email. I did it again for 3
minutes, could you please check? Maybe your mail program thought of me
like spam?! ;-)
Bye, Mel
Yes, they were in the trash. One of my filters caught them. Sorry.
Posted. |
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