| Author |
Message |
mike
Guest
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Posted:
Sat Feb 12, 2005 6:11 am Post subject:
Re: Clock Divider in a 22V10 |
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sam wrote:
| Quote: | Hello all:
I have a 6.144Mhz crystal and I am trying to
generate the 9600*16 ~ 154k clock needed by the
8251 UART and the ~ 1Mhz system clock.
I dont want to use the 74ls* series ripple
counters and I have a bunch of 22v10 PAL chips
lying around.
I have been thinking about how best to do this,
using what I have.
Basically I need to divide the 6.144Mhz by 40.
First by 5 to realize the system clock, then by
8 to realize the UART baud clock.
With the 22v10 I could set aside two 3 bit
"registered" outputs for a GLITCH FREE
synchronous counter ... But I would need the
output of one to drive the other ... and I
dont see how I can do this when they all
share a common CLK input.
By the way I also have a bunch of 74ls112 dual
J/K flip flops lying around (about 25). I
thought I might use that along with the 22v10'
to realize my clock divider.
Any ideas?
|
I guess these come in all kinds of versions, so depends on which
you have.
Check out the power consumption before you go too far.
I've been using old GAL20V8s cause I have a lifetime supply. But the
high current drain makes 'em unsuitable for battery operated systems.
Silly things consume 17mA just sitting idle. Lots more when you clock 'em.
mike
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Fred Bloggs
Guest
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Posted:
Sat Feb 12, 2005 12:16 pm Post subject:
Re: Clock Divider in a 22V10 |
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Glenn Gundlach wrote:
| Quote: | Well sir, I beg to differ a little. My TV remote transcoder boards are
in transit from Advanced Circuits. It uses a 68HC908JK3 to listen to
the IR receiver. I needed a 38kHz for pulsing the IR transmit LED. With
the 32MHz osc, thats divide by 840 so I have an 'F163 to prescale by 15
to
2.133MHz and then do the rest of the counting and gating in a 22V10
(38095 Hz is close enough). It divides by 56 with a 50/50 duty cycle by
counting from 4 to 60 in the 6 bit counter and then the IRQ to the
controller and the gating with the transmit, also from the controller.
The 22V10 is just dandy for this in spite of being a power hog. I can
live with it. Using MSI counters would have been more tedious to work
out and would have used more packages. Gating changes in a GAL are
easily reprogrammed.
GG
|
That sounds like a situation where the PAL makes sense- because you have
other logic in addition to plain counting, but in general, it's a waste
of money to use a PAL to perform a generic MSI function- like a 10-bit
register or a 4-bit counter. Lessee- 56= 7 x 8 so that's a DIV 7 into a
free-running 3-bit binary counter. This would not be bad in SOT:
View in a fixed-width font such as Courier.
,----------------------------------+
| 74HCT393 1/4 |
CLK | ----------- 74HCT00 |
| |____ | |
2.133MHz>-+---|-----|1CLK 1Q0| |
| | | | __ |
| | ,--|1CLR 1Q1|---------| \ |
| | | | | | o--'
| | | | 1Q2|-----+---|__/
| | | | | |
| | | | 1Q3| |
| | | | | | CLK
| | | | | +---+-> ---
| | | | | | 7
| | | | | |
| | | |____ | |
| '-----|2CLK 2Q0|----. |
| | | | | |
'---------|2CLR 2Q1| | |
| | | | |
| | 2Q2| | |
| | | | |
| | 2Q3| | |
| ----------- | |
| | |
'-------------------' |
|
+-------------------------+
|
| 74HCT393
| -----------
| |____ |
+---|1CLK 1Q0|
| |
'0'-+-|1CLR 1Q1|
| | | CLK
| | 1Q2|---------> --- duty 50/50
| | | 56
| | 1Q3|
| | |
| | |
| | |
| | |
| |____ |
+-|2CLK 2Q0|
| | |
+-|2CLR 2Q1|
| |
| 2Q2|
| |
| 2Q3|
----------- |
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Ken Smith
Guest
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Posted:
Sat Feb 12, 2005 10:30 pm Post subject:
Re: Clock Divider in a 22V10 |
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In article <420d1f5f$1@clear.net.nz>,
Jim Granville <no.spam@designtools.co.nz> wrote:
[...]
| Quote: | Good software for 22V10 code is Atmel's free WinCUPL.
|
IMO: ICT's place is better.
--
--
kensmith@rahul.net forging knowledge
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